DFly port deleted the upstream pre-B3 ValleyView PPGTT disable from intel_sanitize_enable_ppgtt: PPGTT enabled on silicon where upstream considers it broken (GPU fault/hang wedge on that hardware)
Summary
Direct diff against Linux v4.19 (the port's base) shows the deleted block: 'if (IS_VALLEYVIEW(dev_priv) && pdev->revision < 0xb) return 0;' from intel_sanitize_enable_ppgtt. On pre-B3 ValleyView steppings the DragonFly driver enables PPGTT where upstream disables it; render submissions under PPGTT contexts on that 2013-era hardware then take GPU page faults/hangs (local DoS via render node, recovered by reset). No memory-safety consequence - the walkers are bounds-correct regardless of the enable bit. Appears to be an accidental trim: the rest of the function matches v4.19 modulo renames, and no rationale exists. Restore the upstream block verbatim.
Discussion (0)
PoC verification
Evidence pack
findings/poc/DF-3770 Β· 6 files| File | Type | Description | Size | |
|---|---|---|---|---|
| README.md | β | 1.6 KB | β raw | |
| VERDICT.md | β | 1.6 KB | β raw | |
| verdict.json | β | 1.9 KB | view raw | |
| manifest.json | β | 472 B | view raw | |
| upstream_v419_diff.txt | β | 376 B | view raw | |
| fix.diff | β | 564 B | view raw |
DF-3770 β DFly port dropped the upstream pre-B3 ValleyView PPGTT disable
Finding
intel_sanitize_enable_ppgtt() (sys/dev/drm/i915/i915_gem_gtt.c:136-183)
is missing a block present in upstream Linux v4.19 (and earlier, since
3.14):
/* Early VLV doesn't have this */
if (IS_VALLEYVIEW(dev_priv) && dev_priv->drm.pdev->revision < 0xb) {
DRM_DEBUG_DRIVER("disabling PPGTT on pre-B3 step VLV\n");
return 0;
}
(verified by direct diff against
raw.githubusercontent.com/torvalds/linux/v4.19 β see upstream_v419_diff.txt).
Effect: on ValleyView (Atom Z-series SoC GPU) pre-B3 silicon the DragonFly driver enables PPGTT (aliasing and/or full) where upstream considers it unsupported. Consequence on that hardware is GPU page faults / GPU hangs when PPGTT-addressed batches execute β an unprivileged local user with render-node access can wedge the GPU (recovered only by the reset machinery). Modern VLV steppings (C0+) are unaffected; all other platforms are unaffected. No memory-safety consequence: the PPGTT walkers themselves are bounds-correct; this is an enable-bit divergence only.
Filed as Info (upstream-divergence record): the removal appears to be an accidental trim during the port rather than a deliberate decision (no commit message rationale; the block is silent in the DFly diff).
Fix
Restore the upstream block β see fix.diff.
Reproduction
Requires an actual pre-B3 ValleyView part; the audit guest is virtio-only
(no Intel GPU at all β pciconf shows 0x1111:1234; no i915kms.ko).
Runtime verification skipped per contract.
DF-3770 β VERDICT
Status: untested (runtime) β Info divergence record; PoC phase skipped per contract and impossible on this guest (virtio-only, no i915).
Evidence
- Direct diff of
sys/dev/drm/i915/i915_gem_gtt.cagainst Linux v4.19drivers/gpu/drm/i915/i915_gem_gtt.cshows the DFly tree deleted theIS_VALLEYVIEW(dev_priv) && revision < 0xb β return 0early-out fromintel_sanitize_enable_ppgtt(v4.19 lines ~176-181; DFly filei915_gem_gtt.c:136-183has no equivalent). Captured inupstream_v419_diff.txt. - Everything else in the function matches v4.19 modulo renames, so the deletion is a local divergence, not part of a larger rework.
Impact assessment
- Hardware gate: ValleyView +
pdev->revision < 0xb(2013 Atom SoCs, B0/B2 steppings). On those parts PPGTT gets enabled where upstream disables it β GPU faults/hangs under render load; local DoS on that hardware only. GPU reset machinery recovers; no corruption of kernel memory results from this divergence (the walkers in this file are bounds-correct independent of the enable bit). - Info severity per rubric: hardening/divergence record, no demonstrated impact on current hardware.
Fix
fix.diff restores the upstream block verbatim (adapted types).
Fix status (batch validation)
Applied with the 36 sibling fix.diffs of this batch in findings/poc/_batch41/all_fixes.patch; single in-guest make -j6 nativekernel KERNCONF=X86_64_GENERIC completed RC=0 with zero errors under -Werror (full log: findings/poc/_batch41/fix_build8.log). Behavior A/B intentionally skipped for this Info-tier item.
Fix verification
not_testablefix.diff restores the upstream block verbatim; no runtime validation possible (no VLV hardware)
findings/poc/DF-3770/fix.diff
Confirmed kernel references
Detail
Evidence (decisive lines)
README.md, VERDICT.md, upstream_v419_diff.txt (direct v4.19 diff showing the deleted block), fix.diff
PoC changes
n/a
Verified recommended fix
Restore the upstream pre-B3 ValleyView disable block in intel_sanitize_enable_ppgtt β see fix.diff
Verdict
Upstream-divergence record, source-certain: the DragonFly port deleted the pre-B3 ValleyView PPGTT disable from intel_sanitize_enable_ppgtt (present verbatim in Linux v4.19; captured in upstream_v419_diff.txt). On VLV B0/B2 silicon the driver now enables PPGTT where upstream disables it, enabling GPU-fault/hang wedging by any local render-node user on that specific 2013-era hardware; recoverable via GPU reset, no kernel memory-safety impact (walkers are bounds-correct regardless of the enable bit). Info severity. Runtime verification skipped (no VLV hardware; audit guest is virtio-only with no i915 device or module). Restore the upstream block per fix.diff.
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