ichsmb_wait timeout path never aborts the in-flight transaction β late completions are mis-attributed to the next command, which then returns success with stale/zero data
Summary
A single hz/4 sleep then a software-only reset: ICH_HST_CNT_KILL is never written and HST_STA not reset, so the host can stay busy and a late completion satisfies the NEXT command's ok_bits and wakes it SMB_ENOERR while its transfer is still in flight - silent stale/zero data on sensor/IPMI reads. ig4 DF-5386/5389 classes; not live-reproducible (needs a >250ms stalled bus which stock QEMU cannot do). Kill-on-timeout + generation-token fix.
Discussion (0)
PoC verification
Evidence pack
findings/poc/DF-5461 Β· 2 files| File | Type | Description | Size | |
|---|---|---|---|---|
| README.md | file | 1.4 KB | β raw | |
| verdict.json | file | 1.7 KB | view raw |
DF-5461 β ichsmb_wait timeout path leaves the transaction running and re-arms stale completions (trace-only pack)
ichsmb_wait() (ichsmb.c:629-654) sleeps exactly once for hz/4; on
EWOULDBLOCK it prints, sets sc->ich_cmd = -1 (ichsmb.c:646) and returns
SMB_ETIMEOUT β but the host controller transaction is never aborted:
- ICH_HST_CNT_KILL (ichsmb_reg.h:80) is never written anywhere in the driver,
- HST_STA is not reset, the controller can remain HOST_BUSY.
A completion that lands after the timeout is then processed with
ich_cmd == -1 (unexpected-irq path, ichsmb.c:529-535: cleared + logged), or
β if a new command was already started β is mis-attributed to it
(ok_bits match at ichsmb.c:521-528), waking ichsmb_wait for a transaction
still in flight: the new op returns SMB_ENOERR with stale/zero data
(silent data corruption; e.g. security-relevant sensor/IPMI reads), after
which the real completion is discarded as unexpected. ig4-family siblings:
DF-5386 (error swallowed as success) and DF-5389 (stale state leaks into the
next transaction).
Not verified live: the rig's slaves always complete promptly and QEMU offers no way to stall an SMBus transaction past hz/4. Trace-confirmed; severity Low. Fix sketch: on timeout, write ICH_HST_CNT_KILL | INTREN, clear HST_STA, drain before returning; use a generation counter so late completions can't satisfy a newer wait.
Fix verification
not_testableConfirmed kernel references
Detail
Evidence (decisive lines)
README.md trace; ichsmb.c:602-609 (INTR completes whatever ich_cmd is set), 637 (single hz/4 sleep), 643-648 (timeout resets ich_cmd only)
Verified recommended fix
On ichsmb_wait timeout: write ICH_HST_CNT_KILL, clear HST_STA, and fence stale completions (generation token checked by the ISR before wakeup).
Verdict
Trace-proven: the hz/4 timeout path (ichsmb.c:643-648) neither aborts the in-flight hardware transaction (ICH_HST_CNT_KILL never used) nor fences late completions, so a stale INTR can complete the NEXT transaction with SMB_ENOERR and stale/zero data. Cannot be reproduced on the QEMU rig (slaves complete immediately; no way to stall an emulated SMBus transfer past hz/4). Low severity, fault/precondition-gated data-integrity bug (ig4 DF-5386/5389 family).
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