DF-5391
No suspend/resume/shutdown lifecycle: controller loses programming across D3 while softc caches stay 'valid' β bus dead until reload
Summary
Neither attachment registers suspend/resume/shutdown: D3 resets the MMIO file but slave_valid=1/last_slave survive, set_slave_addr early-returns without reprogramming TAR/CTL/clock, and every post-resume transfer times out 25ms/byte until reload. All controller-behind devices (touchpads/sensors/SSIF BMC) silently die after suspend/resume. DEVMETHOD-resume re-running hw-init fix.
Discussion (0)
PoC verification
Evidence pack
findings/poc/DF-5391 Β· 1 files| File | Type | Description | Size | |
|---|---|---|---|---|
| verdict.json | file | 1.0 KB | view raw |
Fix verification
not_testablebaseline noβ patch + rebuild βpatched clean
per-fix-DF-5391
Confirmed kernel references
Detail
Evidence (decisive lines)
wire-level source proof vs SMBus 2.0 spec + ig4_reg.h documented abort/flush semantics
Verified recommended fix
see finding markdown
Verdict
untested (hardware-gated: no Intel LPSS I2C model in QEMU; pm SMBus is ichsmb, ACPI-injected fakes fail the COMP_VER gate)
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