u32-domain shift truncation: PF_LFB_SIZE<<24 wraps before assignment to u64 node_segment_size, silently mis-placing XGMI VRAM/GART apertures

Summary

REG_GET_FIELD is pure u32 arithmetic so the <<24 evaluates in the u32 domain before the u64 assignment: any PF_LFB_SIZE >= 0x100 (>=4GB carveout, 16-bit field) wraps mod 2^32 - 256GB segment stores 0, 4.25GB stores 16MB - and gmc_v9_0_vram_gtt_location computes per-node VRAM/GART bases from it, mis-placing apertures on a Vega20 XGMI hive. No attacker path: firmware-programmed register, VEGA20-gated, single-GPU skips the block entirely. (u64) cast one-liner fix.