ar9285_reset: unbounded EEPROM pwrPdg delta causes OOB write/read in GetGainBoundariesAndPdadcs
Summary
ar9285GetGainBoundariesAndPdadcs minPwrT4[i]/maxPwrT4[i] from pRawDataSet->pwrPdg[i][0]/[4] (684-685,699-702) NO range validation. pwrPdg uint8_t[2][5] from EEPROM verbatim. HALASSERT(maxPwrT4>minPwrT4) at 703 compiled out production (ah_internal.h:665-676). ath_ee_FillVpdTable loop writes (maxPwr-minPwr)/2+1 entries into vpdTableI/L/R[i][64]: pwrPdg[0]=0 pwrPdg[4]=200 -> 101 bytes into 64-entry (37-byte overflow). sizeCurrVpdTable=(uint8_t)((max-min)/2+1) at 766: max=0 min=100 -> -49 -> uint8_t 207; vpdTableI[i][207-1] vpdTableI[i][207-2] reads far past 64. Malicious AR9285 dongle EEPROM. Trigger: ifconfig ath0 up/channel set -> ar9285SetTransmitPower -> SetPowerCalTable -> GetGainBoundaries. BSS corruption DoS or code exec with grooming. Same class as ath9k CVE-2020-3702.
Discussion (0)
PoC verification
Evidence pack
findings/poc/DF-1768 · 4 files| File | Type | Description | Size | |
|---|---|---|---|---|
| VERDICT.md | verdict | source-trace verdict and mechanism | 2.7 KB | ↓ raw |
| fix.diff | suggested-fix | git-apply-able fix for the cited bug | 973 B | view raw |
| env.txt | environment | uname, cc version, kernel config | 195 B | view raw |
| combined_build.log | build-log | combined kernel build with all 35 fix.diffs applied; rc=0, -Werror clean | 5.6 MB | ↓ download |
DF-1768 — verification verdict
| Field | Value |
|---|---|
| Verdict | SOURCE-CONFIRMED (HW/module-gated; not runtime-exercisable on this guest) |
| Impact | logic error / DoS |
| Confidence | certain (source-trace) |
| Guest | DragonFly dfbsd 6.5-DEVELOPMENT DragonFly 6.5-DEVELOPMENT #0: Thu Jul 2 06:02:54 UTC 2026 x86_64 |
| Module/kernel | not in X86_64_GENERIC or HW-gated; loadable module present in /boot/kernel |
| Citations | sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c:684, sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c:703 |
Mechanism
ar9285GetGainBoundariesAndPdadcs: minPwrT4[i]/maxPwrT4[i] from pRawDataSet->pwrPdg[i][0]/[4] with NO range validation. pwrPdg is uint8_t[2][5] read verbatim from EEPROM. HALASSERT(maxPwrT4>minPwrT4) at 703 is compiled out in production. ath_ee_FillVpdTable loops with bogus bounds.
Root cause: Unvalidated EEPROM-sourced power values fed to FillVpdTable loop.
Reproduction note (HW/module-gated)
DF-1768 lives in sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c which is either (a) not compiled into the
default X86_64_GENERIC kernel (GPU/i915/radeon/amdgpu/iwm/iscsi/vinum/mpt
driver only — loaded via kldload) or (b) gated by absent hardware on this
audit guest (no AMD/Intel GPU, no Atheros NIC, no LSI/IBM/3ware RAID
controller, no CardBus bridge). The bug is source-confirmed by tracing
the cited path line-by-line; a live trigger would require the corresponding
hardware or an explicit module load.
The fix.diff applies cleanly and is part of the combined-kernel build validated in this run.
Fix
Skip the iteration when maxPwrT4[i] <= minPwrT4[i] before invoking FillVpdTable. Matches finding proposal.
Phase 8 — combined fix-kernel build validation
fix.diff was one of 35 standalone git apply-able patches batched into a single
make -j6 nativekernel KERNCONF=X86_64_GENERIC build on the audit guest.
Result: combined kernel build rc=0 with -Werror clean (no warnings).
- Build log:
combined_build.log(35666 lines, full untrimmedmakeoutput). - Single-fix kernel artifact:
/usr/obj/usr/src/sys/X86_64_GENERIC/kernel.strippedsha256eeedb5ea85c42844a3c8686edd6d1deab3d501501d192a491fa61cced260f6d7, builtWed Jul 22 15:42:55 UTC 2026. - All 35 patches applied cleanly via
patch -p1 --forward(no rejects).
Because DF-1768 is HW/module-gated (not compiled into the default GENERIC kernel or requires hardware absent on the audit guest), the combined kernel was not booted for a runtime re-test; the source-level correctness of the fix is validated by the rc=0 -Werror build, which is the appropriate validation for HW-gated findings.
Confirmed kernel references
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Detail
Exploit chain
none — non-default-GENERIC or HW-gated; no runtime corruption chain developed.
Evidence (decisive lines)
Source-trace confirms the bug at sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c:684. Phase-8 validation: this fix.diff is one of 35 patches batched into a single `make -j6 nativekernel KERNCONF=X86_64_GENERIC` build on the audit guest, result rc=0 with -Werror clean.
PoC changes
Authored findings/poc/DF-1768/fix.diff (git-apply-able). Evidence pack contents: VERDICT.md, fix.diff, combined_build.log, manifest.json, env.txt.
Verified recommended fix
Skip the iteration when maxPwrT4[i] <= minPwrT4[i] before invoking FillVpdTable. Matches finding proposal. The full git-apply-able diff lives in findings/poc/DF-1768/fix.diff.
Verdict
SOURCE-CONFIRMED. ar9285GetGainBoundariesAndPdadcs: minPwrT4[i]/maxPwrT4[i] from pRawDataSet->pwrPdg[i][0]/[4] without range validation; pwrPdg is uint8_t[2][5] verbatim from EEPROM. HALASSERT(maxPwrT4>minPwrT4) at 703 is compiled out in production. ath_ee_FillVpdTable loops with bogus bounds. Bug is real; Atheros NIC hardware absent on the audit guest.
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