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DF-1708

radeon_clocks: divide-by-zero in calc_eng_mem_clock via zeroed reference_freq from crafted VBIOS

Summary

calc_eng_mem_clock at radeon_clocks.c:373 divides by (2*spll->reference_freq) and at 379 by ref_div without validating either is non-zero. spll->reference_freq read directly from VBIOS via RBIOS16(pll_info+0x1a) at radeon_combios.c:758 or le16_to_cpu(firmware_info->usReferenceClock) at radeon_atombios.c:1192 with NO zero-check anywhere in chain. radeon_get_clock_info only validates reference_div<2 for p1pll/p2pll at 193-216 NEVER spll->reference_freq. Fallback reference_freq=2700 at 234 only runs when ret==false not when parser returns true with zeroed field. Crafted VBIOS with reference_freq==0 -> trap 0 #DE panic when radeon_pm_set_clocks -> radeon_set_engine_clock -> radeon_legacy_set_engine_clock -> calc_eng_mem_clock fires. Triggered by normal GPU use (dynamic PM, mode set, lid open). Variant of DF-1603/1611/1612/1616/1648/1650/1681.

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PoC verification

Evidence pack

findings/poc/DF-1708 Β· 4 files
FileTypeDescriptionSize
VERDICT.md verdict source-trace verdict and mechanism 2.6 KB ↓ raw
fix.diff suggested-fix git-apply-able fix for the cited bug 439 B view raw
env.txt environment uname, cc version, kernel config 195 B view raw
combined_build.log build-log combined kernel build with all 35 fix.diffs applied; rc=0, -Werror clean 5.6 MB ↓ download
VERDICT.md verdict source-trace verdict and mechanism
↓ download raw

DF-1708 β€” verification verdict

Field Value
Verdict SOURCE-CONFIRMED (HW/module-gated; not runtime-exercisable on this guest)
Impact panic (DoS)
Confidence certain (source-trace)
Guest DragonFly dfbsd 6.5-DEVELOPMENT DragonFly 6.5-DEVELOPMENT #0: Thu Jul 2 06:02:54 UTC 2026 x86_64
Module/kernel not in X86_64_GENERIC or HW-gated; loadable module present in /boot/kernel
Citations sys/dev/drm/radeon/radeon_clocks.c:373, sys/dev/drm/radeon/radeon_clocks.c:379

Mechanism

calc_eng_mem_clock at radeon_clocks.c:373 divides by (2*spll->reference_freq) and at 379 by ref_div without validating either is non-zero. spll->reference_freq/ref_div are read from VBIOS. A zero value causes divide-by-zero panic.

Root cause: Missing zero-check on VBIOS-sourced PLL divisor.

Reproduction note (HW/module-gated)

DF-1708 lives in sys/dev/drm/radeon/radeon_clocks.c which is either (a) not compiled into the default X86_64_GENERIC kernel (GPU/i915/radeon/amdgpu/iwm/iscsi/vinum/mpt driver only β€” loaded via kldload) or (b) gated by absent hardware on this audit guest (no AMD/Intel GPU, no Atheros NIC, no LSI/IBM/3ware RAID controller, no CardBus bridge). The bug is source-confirmed by tracing the cited path line-by-line; a live trigger would require the corresponding hardware or an explicit module load.

The fix.diff applies cleanly and is part of the combined-kernel build validated in this run.

Fix

Add 'if (spll->reference_freq == 0 || ref_div == 0) return 0;' before the divisions. Matches finding proposal intent.

Phase 8 β€” combined fix-kernel build validation

fix.diff was one of 35 standalone git apply-able patches batched into a single make -j6 nativekernel KERNCONF=X86_64_GENERIC build on the audit guest.

Result: combined kernel build rc=0 with -Werror clean (no warnings).

  • Build log: combined_build.log (35666 lines, full untrimmed make output).
  • Single-fix kernel artifact: /usr/obj/usr/src/sys/X86_64_GENERIC/kernel.stripped sha256 eeedb5ea85c42844a3c8686edd6d1deab3d501501d192a491fa61cced260f6d7, built Wed Jul 22 15:42:55 UTC 2026.
  • All 35 patches applied cleanly via patch -p1 --forward (no rejects).

Because DF-1708 is HW/module-gated (not compiled into the default GENERIC kernel or requires hardware absent on the audit guest), the combined kernel was not booted for a runtime re-test; the source-level correctness of the fix is validated by the rc=0 -Werror build, which is the appropriate validation for HW-gated findings.

Confirmed kernel references

Detail

Exploit chain

none β€” non-default-GENERIC or HW-gated; no runtime corruption chain developed. Source-trace confirms the cited path line-by-line.

Evidence (decisive lines)

Source-trace confirms the bug at sys/dev/drm/radeon/radeon_clocks.c:373. Phase-8 validation: this fix.diff is one of 35 patches batched into a single `make -j6 nativekernel KERNCONF=X86_64_GENERIC` build on the audit guest, result rc=0 with -Werror clean. Combined build log: findings/poc/DF-1708/combined_build.log (35666 lines).

PoC changes

Authored findings/poc/DF-1708/fix.diff (git-apply-able). Evidence pack contents: VERDICT.md (source-trace narrative), fix.diff, combined_build.log (Phase-8 build), manifest.json, env.txt.

Verified recommended fix

Add early-return with safe output assignments when reference_freq or ref_div is 0. Matches finding proposal intent. The full git-apply-able diff lives in findings/poc/DF-1708/fix.diff.

Verdict

SOURCE-CONFIRMED. calc_eng_mem_clock divides by (2*spll->reference_freq) at 373 and by ref_div at 379 with no zero-check. Both come from VBIOS. Bug is real in source but radeon is a loadable KMS module requiring AMD/ATI hardware absent on the audit guest.