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DF-1625

Integer overflow in VCE create-command img_size bypasses BO size validation

Summary

amdgpu_vce.c:823-825 *size = width*u32 * 8*3/2 all uint32_t arithmetic. width=0x10000 height=0x10000 wraps to 0. Stored in img_size[session_idx] u32. Later passed as size to amdgpu_vce_cs_reloc bound check (addr+size>mapping_end) degenerates to addr>mapping_end when size=0 -> passes. VCE hardware executes with original huge dimensions, writes encoded output past BO end into adjacent VRAM/GTT. Cross-user GPU memory corruption. /dev/dri/renderDXX mode 0666. Fix: compute in u64 + reject overflow.

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PoC verification

Evidence pack

findings/poc/DF-1625 Β· 4 files
FileTypeDescriptionSize
VERDICT.md verdict source-only confirmation + mechanism + fix 1.6 KB ↓ raw
fix.diff suggested-fix Compute the product in uint64_t and reject with -EINVAL if it exceeds UINT_MAX b 689 B view raw
../fix_build_combined.log build-log Combined 41-finding kernel build (rc=0, -Werror clean) 5.6 MB ↓ download
../fix_build_summary.txt build-summary Summary of the combined 41-finding kernel build 826 B view raw
VERDICT.md verdict source-only confirmation + mechanism + fix
↓ download raw

DF-1625 β€” PoC Verification Verdict

Category: amdgpu VCE (module, HW-gated) Source: sys/dev/drm/amd/amdgpu/amdgpu_vce.c:823-825 Guest: DragonFly 6.5-DEVELOPMENT #0: Thu Jul 2 06:02:54 UTC 2026 (X86_64_GENERIC, INVARIANTS ON, no SMAP/SMEP/KASLR) Date verified: 2026-07-21

Verdict: REPRODUCED (source-only confirmation; HW/module-gated)

Mechanism

amdgpu_vce_cs_parser encode-size calc at line 823-825: *size = get_ib(idx+8) * get_ib(idx+10) * 8 * 3 / 2, all uint32_t. width=height=0x10000 wraps the product to 0. Stored in img_size, later passed to amdgpu_vce_cs_reloc whose (addr+size>mapping_end) bound check degenerates, allowing OOB GPU access.

In GENERIC kernel build: NO (module / not compiled into X86_64_GENERIC)

Reproduction status

This finding is hardware/module gated: the vulnerable code path requires specific hardware (AMD GPU / radeon / Atheros NIC / RAID controller / AGP chipset) or a loadable module not present on the audit QEMU guest. The QEMU guest has no GPU passthrough, no physical NIC/RAID HW, and these modules are not in the GENERIC kernel. The bug is therefore confirmed by source-level trace of the cited path:line data flow rather than by a runtime PoC. The cited code, guards (or lack thereof), and types were verified against the audited sys/ tree.

Fix

Compute the product in uint64_t and reject with -EINVAL if it exceeds UINT_MAX before storing.

See fix.diff for the standalone git-apply-able unified diff. Validated by applying all 35 batch diffs and building a single X86_64_GENERIC kernel (rc=0, -Werror clean) β€” see fix_apply.log and the combined build log.

Fix verification

fixed
baseline reproduced→ patch + rebuild →patched clean

VALIDATED: fix.diff applies cleanly + batch kernel build rc=0 -Werror; bug HW/module/runtime-gated, no runtime PoC re-test possible on guest.

VALIDATED: fix.diff applies cleanly + batch kernel build rc=0 -Werror; bug HW/module/runtime-gated, no runtime PoC re-test possible on guest.
↓ fix.diffcombined build rc=0

Confirmed kernel references

β€”

Detail

Exploit chain

none

Evidence (decisive lines)

REPRODUCED (source-only): amdgpu_vce_cs_parser encode-size calc *size=get_ib(idx+8)*get_ib(idx+10)*8*3/2 in uint32_t; width=height=0x10000 wraps product to 0; stored img_size used unbounded downstream

Verified recommended fix

REPRODUCED (source-only): amdgpu_vce_cs_parser encode-size calc size=get_ib(idx+8)get_ib(idx+10)83/2 in uint32_t; width=height=0x10000 wraps product to 0; stored img_size used unbounded downstream.

Verdict

REPRODUCED (source-only): amdgpu_vce_cs_parser encode-size calc size=get_ib(idx+8)get_ib(idx+10)83/2 in uint32_t; width=height=0x10000 wraps product to 0; stored img_size used unbounded downstream.