#define	CPULOCK_CNTMASK	0x7ffffffe
#define	CPULOCK_EXCLBIT	0
#define	CPULOCK_EXCL	0x1
#define	CPULOCK_INCR	0x2
#define	GD_CNT	0xa8
#define	GD_COMMON_TSSD	0x3a80
#define	GD_COMMON_TSS	0x3a98
#define	GD_CPUID	0x48
#define	GD_CPUMASK	0x50
#define	GD_CURRENTLDT	0x3f14
#define	GD_CURTHREAD	0x8
#define	GD_FPENDING	0x3f04
#define	GD_FPU_LOCK	0x3f00
#define	GD_INTR_NESTING_LEVEL	0xa0
#define	GD_IPENDING	0x3f08
#define	GD_NPXTHREAD	0x3a90
#define	GD_OTHER_CPUS	0x70
#define	GD_REQFLAGS	0x18
#define	GD_SAVEFPU	0x3b00
#define	GD_SPENDING	0x3f0c
#define	GD_SS_EFLAGS	0x3f48
#define	GD_TSS_GDT	0x3a88
#define	LWP_VMSPACE	0x38
#define	PCB_DBREGS	0x2
#define	PCB_DR0	0xc8
#define	PCB_DR1	0xd0
#define	PCB_DR2	0xd8
#define	PCB_DR3	0xe0
#define	PCB_DR6	0xe8
#define	PCB_DR7	0xf0
#define	PCB_FLAGS	0xb0
#define	PCB_FSBASE	0xa0
#define	PCB_GSBASE	0xa8
#define	PCB_R12	0x60
#define	PCB_R13	0x58
#define	PCB_R14	0x50
#define	PCB_R15	0x48
#define	PCB_RBP	0x68
#define	PCB_RBX	0x78
#define	PCB_RIP	0x80
#define	PCB_RSP	0x70
#define	PCB_SAVEFPU_SIZE	0x400
#define	PCB_SAVEFPU	0x100
#define	PM_ACTIVE_LOCK	0x4c
#define	PM_ACTIVE	0x50
#define	SIGF_HANDLER	0
#define	SIGF_UC	0x40
#define	TDF_RUNNING	0x1
#define	TD_CRITCOUNT	0xd4
#define	TD_FLAGS	0xd8
#define	TD_LWP	0xa0
#define	TD_PCB	0xb0
#define	TD_PRI	0xd0
#define	TD_SAVEFPU	0x628
#define	TD_SP	0x100
#define	TSS_RSP0	0x4
#define	VM_PMAP	0x120