diff --git a/sys/bus/smbus/ichiic/ig4_pci.c b/sys/bus/smbus/ichiic/ig4_pci.c
index 6aefb6a..e98b522 100644
--- a/sys/bus/smbus/ichiic/ig4_pci.c
+++ b/sys/bus/smbus/ichiic/ig4_pci.c
@@ -137,6 +137,24 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = {
 	{ PCI_CHIP_CANNONLAKE_H_I2C_3, "Intel Cannon Lake-H I2C Controller-3", IG4_CANNONLAKE},
 };
 
+/*
+ * Resolve the controller generation from the PCI device id.  Must be
+ * (re-)run from attach: ig4iic_pci_attach()'s bzero() of the softc wipes
+ * anything ig4iic_pci_probe() stored there (probe sets sc->version at
+ * ig4_pci.c:151, the bzero follows at ig4_pci.c:167).
+ */
+static enum ig4_vers
+ig4iic_pci_devid_version(uint32_t devid)
+{
+	int i;
+
+	for (i = 0; i < nitems(ig4iic_pci_devices); i++) {
+		if (ig4iic_pci_devices[i].devid == devid)
+			return (ig4iic_pci_devices[i].version);
+	}
+	return (IG4_HASWELL);
+}
+
 static int
 ig4iic_pci_probe(device_t dev)
 {
@@ -148,7 +166,7 @@ ig4iic_pci_probe(device_t dev)
 	for (i = 0; i < nitems(ig4iic_pci_devices); i++) {
 		if (ig4iic_pci_devices[i].devid == devid) {
 			device_set_desc(dev, ig4iic_pci_devices[i].desc);
-			sc->version = ig4iic_pci_devices[i].version;
+			sc->version = ig4iic_pci_devid_version(devid);
 			return (BUS_PROBE_DEFAULT);
 		}
 	}
@@ -167,6 +185,7 @@ ig4iic_pci_attach(device_t dev)
 	bzero(sc, sizeof(*sc));
 
 	lwkt_serialize_init(&sc->slz);
+	sc->version = ig4iic_pci_devid_version(pci_get_devid(dev));
 
 	sc->dev = dev;
 	sc->regs_rid = PCIR_BAR(0);