#define	CPULOCK_CNTMASK	0x7ffffffe
#define	CPULOCK_EXCLBIT	0
#define	CPULOCK_EXCL	0x1
#define	CPULOCK_INCR	0x2
#define	CPUMASK_ELEMENTS	0x4
#define	EFAULT	0xe
#define	ENAMETOOLONG	0x3f
#define	FIRST_SOFTINT	0xc0
#define	GD_CNT	0xa8
#define	GD_COMMON_TSSD	0x3a80
#define	GD_COMMON_TSS	0x6f98
#define	GD_CPUID	0x48
#define	GD_CPUMASK_OFFSET	0x3780
#define	GD_CPUMASK_SIMPLE	0x3778
#define	GD_CPUMASK	0x50
#define	GD_CURTHREAD	0x8
#define	GD_DEBUG1	0x3a28
#define	GD_DEBUG2	0x3a30
#define	GD_FPU_LOCK	0x42c0
#define	GD_INTR_NESTING_LEVEL	0xa0
#define	GD_IPENDING	0x4370
#define	GD_IRESERVED	0x371c
#define	GD_NPOLL	0x2230
#define	GD_NPXTHREAD	0x3a90
#define	GD_OTHER_CPUS	0x70
#define	GD_PRIVATE_TSS	0x42d8
#define	GD_REQFLAGS	0x18
#define	GD_SAMPLE_PC	0x3758
#define	GD_SAMPLE_SP	0x3770
#define	GD_SAVEFPU	0x3ac0
#define	GD_SPENDING	0x42cc
#define	GD_SS_EFLAGS	0x42e4
#define	GD_TRAMPOLINE	0x6f00
#define	GD_TSS_GDT	0x3a88
#define	GD_USER_FS	0x4340
#define	GD_USER_GS	0x4348
#define	IOAPIC_IRQI_ADDR	0x8
#define	IOAPIC_IRQI_FLAGS	0
#define	IOAPIC_IRQI_FLAG_LEVEL	0x1
#define	IOAPIC_IRQI_FLAG_MASKED	0x2
#define	IOAPIC_IRQI_IDX	0x4
#define	IOAPIC_IRQI_SIZE	0x10
#define	IOAPIC_IRQI_SZSHIFT	0x4
#define	KCSEL	0x8
#define	KDSEL	0x10
#define	KERNBASE	0xffffffff80000000
#define	KUCSEL	0x2b
#define	KUDSEL	0x23
#define	LWP_VMSPACE	0x38
#define	MACHINTR_INTREN	0x10
#define	MAXCOMLEN	0x10
#define	MDGLOBALDATA_BASEALLOC_PAGES	0x5
#define	MSR_FSBASE	0xc0000100
#define	MSR_GSBASE	0xc0000101
#define	MSR_KGSBASE	0xc0000102
#define	NPDEPG	0x200
#define	NPTEPG	0x200
#define	PAGE_MASK	0xfff
#define	PAGE_SHIFT	0xc
#define	PAGE_SIZE	0x1000
#define	PCB_CR3_ISO	0x38
#define	PCB_CR3	0x40
#define	PCB_DBREGS	0x2
#define	PCB_DR0	0xc8
#define	PCB_DR1	0xd0
#define	PCB_DR2	0xd8
#define	PCB_DR3	0xe0
#define	PCB_DR6	0xe8
#define	PCB_DR7	0xf0
#define	PCB_EXT	0x530
#define	PCB_FLAGS	0xb0
#define	PCB_FSBASE	0xa0
#define	PCB_GSBASE	0xa8
#define	PCB_ISOMMU	0x10
#define	PCB_ONFAULT_SP	0x508
#define	PCB_ONFAULT	0x500
#define	PCB_R12	0x60
#define	PCB_R13	0x58
#define	PCB_R14	0x50
#define	PCB_R15	0x48
#define	PCB_RBP	0x68
#define	PCB_RBX	0x78
#define	PCB_RIP	0x80
#define	PCB_RSI	0x88
#define	PCB_RSP	0x70
#define	PCB_SAVEFPU_SIZE	0x400
#define	PCB_SAVEFPU	0x100
#define	PCB_SIZE	0x540
#define	PDRSHIFT	0x15
#define	PM_ACTIVE_LOCK	0x4c
#define	PM_ACTIVE	0x50
#define	RQF_AST_LWKT_RESCHED	0x20
#define	RQF_AST_MASK	0x3c
#define	RQF_AST_OWEUPC	0x4
#define	RQF_AST_SIGNAL	0x8
#define	RQF_AST_USER_RESCHED	0x10
#define	RQF_HVM_MASK	0x18bf
#define	RQF_INTPEND	0x2
#define	RQF_IPIQ	0x1
#define	RQF_QUICKRET	0x400
#define	RQF_TIMER	0x80
#define	RQF_XINVLTLB	0x1000
#define	SIGF_HANDLER	0
#define	SIGF_UC	0x40
#define	SPEC_CTRL_DUMMY_ENABLE	0x20000
#define	SPEC_CTRL_DUMMY_IBPB	0x10000
#define	SPEC_CTRL_MDS_ENABLE	0x40000
#define	TDF_KERNELFP	0x1000000
#define	TDF_PREEMPT_DONE	0x8
#define	TDF_RUNNING	0x1
#define	TDF_USINGFP	0x800000
#define	TDPRI_INT_SUPPORT	0x14
#define	TD_CRITCOUNT	0xd4
#define	TD_FLAGS	0xd8
#define	TD_LWP	0xa0
#define	TD_MACH	0x620
#define	TD_NEST_COUNT	0x13c
#define	TD_PCB	0xb0
#define	TD_PREEMPTED	0x1b0
#define	TD_PRI	0xd0
#define	TD_PROC	0xa8
#define	TD_SAVEFPU	0x628
#define	TD_SP	0x100
#define	TD_TYPE	0x154
#define	TD_WCHAN	0xc8
#define	TF_ADDR	0x88
#define	TF_CS	0xa8
#define	TF_ERR	0x98
#define	TF_FLAGS	0x90
#define	TF_R10	0x48
#define	TF_R11	0x50
#define	TF_R12	0x58
#define	TF_R13	0x60
#define	TF_R14	0x68
#define	TF_R15	0x70
#define	TF_R8	0x20
#define	TF_R9	0x28
#define	TF_RAX	0x30
#define	TF_RBP	0x40
#define	TF_RBX	0x38
#define	TF_RCX	0x18
#define	TF_RDI	0
#define	TF_RDX	0x10
#define	TF_RFLAGS	0xb0
#define	TF_RIP	0xa0
#define	TF_RSI	0x8
#define	TF_RSP	0xb8
#define	TF_SIZE	0xc8
#define	TF_SS	0xc0
#define	TF_TRAPNO	0x80
#define	TF_XFLAGS	0x78
#define	TR_CR2	0
#define	TR_CS	0x30
#define	TR_ERR	0x20
#define	TR_PCB_CR3_ISO	0x60
#define	TR_PCB_CR3_SAVED	0x88
#define	TR_PCB_CR3	0x68
#define	TR_PCB_FLAGS	0x58
#define	TR_PCB_GS_KERNEL	0x78
#define	TR_PCB_GS_SAVED	0x80
#define	TR_PCB_RSP	0x50
#define	TR_PCB_SPEC_CTRL	0x70
#define	TR_RAX	0x8
#define	TR_RCX	0x10
#define	TR_RDX	0x18
#define	TR_RFLAGS	0x38
#define	TR_RIP	0x28
#define	TR_RSP	0x40
#define	TR_SS	0x48
#define	TSS_RSP0	0x4
#define	UPAGES	0x4
#define	USRSTACK	0x7fffffe00000
#define	VM_MAX_USER_ADDRESS	0x7fffffe00000
#define	VM_PMAP	0x120
#define	V_IPI	0x10
#define	V_TIMER	0x14