⬢ DragonFlyBSD Kernel Audit
DF-5092 / verify_static.out
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== ar5416_gpio.c:136-155 (bug: CfgInput sets DRV_ALL 'drive always') ==
HAL_BOOL
ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
{
	uint32_t gpio_shift, reg;

	HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins);

	HALDEBUG(ah, HAL_DEBUG_GPIO, "%s: gpio=%d\n", __func__, gpio);

	/* TODO: configure input mux for AR5416 */
	/* If configured as input, set output to tristate */
	gpio_shift = gpio << 1;

	reg = OS_REG_READ(ah, AR_GPIO_OE_OUT);
	reg &= ~(AR_GPIO_OE_OUT_DRV << gpio_shift);
	reg |= AR_GPIO_OE_OUT_DRV_ALL << gpio_shift;
	OS_REG_WRITE(ah, AR_GPIO_OE_OUT, reg);

	return AH_TRUE;
}

== ar5416reg.h:570-574 (DRV_NO = tristate is the intended value) ==
#define	AR_GPIO_OE_OUT_DRV	0x3	/* 2 bit mask shifted by 2*bitpos */
#define	AR_GPIO_OE_OUT_DRV_NO	0x0	/* tristate */
#define	AR_GPIO_OE_OUT_DRV_LOW	0x1	/* drive if low */
#define	AR_GPIO_OE_OUT_DRV_HI	0x2	/* drive if high */
#define	AR_GPIO_OE_OUT_DRV_ALL	0x3	/* drive always */

== ar5212_gpio.c:57-66 (twin does tristate via CR_N) ==
ar5212GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
{
	HALASSERT(gpio < AR_NUM_GPIO);

	OS_REG_WRITE(ah, AR_GPIOCR, 
		  (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))
		| AR_GPIOCR_CR_N(gpio));

	return AH_TRUE;
}

== ar5416_btcoex.c:353,357 (externally-driven BT sense pins configured 'input') ==
		 * Configure the desired GPIO ports for input
		 */
		ar5416GpioCfgInput(ah, ahp->ah_btActiveGpioSelect);
		ar5416GpioCfgInput(ah, ahp->ah_btPriorityGpioSelect);


== consumer pin counts: gpio <= 13, so in-range shifts are safe ==
sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c:985:	pCap->halNumGpioPins = 14;
sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c:882:	pCap->halNumGpioPins = 10;
sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c:529:	pCap->halNumGpioPins = 12;
sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c:435:	pCap->halNumGpioPins = 10;