{
  "finding_id": "DF-4975",
  "status": "untested",
  "reproduced": 0,
  "impact": "none",
  "confidence": "likely",
  "verdict": "Real init-order race, proven by full code trace but not executable on the audit guest (no AMD GPU / no SR-IOV VF / amdgpu not compiled in). xgpu_ai_mailbox_get_irq() enables the mailbox RCV interrupt source (mxgpu_ai.c:351 amdgpu_irq_get -> xgpu_ai_set_mailbox_rcv_irq VALID_INT_EN=1) before INIT_WORK(&adev->virt.flr_work) at mxgpu_ai.c:360; a host/PF-timed IDH_FLR_NOTIFICATION in the window hits xgpu_ai_mailbox_rcv_irq:296 schedule_work() on a kzalloc-zeroed work_struct, and the DFly workqueue shim executes work->func(work) with func==NULL (linux_workqueue.c:89) -> kernel panic. RUNTIME caps bit is proven set before late_init (amdgpu_device.c:1696 release_full_gpu sets it via amdgpu_virt.c:282; amdgpu_device_ip_late_init at amdgpu_device.c:2700 runs later), so the schedule_work gate is open. Twin of DF-4755 (mxgpu_vi.c:600-609); mxgpu_ai.c had no prior finding of this class. Window also re-opens on resume (amdgpu_device.c:2936 re-runs late_init).",
  "exploit_chain": "",
  "evidence": "findings/poc/DF-4975/VERDICT.md (hop-by-hop trace); findings/poc/DF-4975/env.txt (guest hardware absence); decisive refs: mxgpu_ai.c:351 vs mxgpu_ai.c:360; mxgpu_ai.c:287-310; amdgpu_virt.c:282; amdgpu_device.c:1696 vs :2700; amdgpu_kms.c:180; linux_workqueue.c:89",
  "kernel_refs": [
    "sys/dev/drm/amd/amdgpu/mxgpu_ai.c:351",
    "sys/dev/drm/amd/amdgpu/mxgpu_ai.c:360",
    "sys/dev/drm/amd/amdgpu/mxgpu_ai.c:287-310",
    "sys/dev/drm/amd/amdgpu/mxgpu_ai.c:273-285",
    "sys/dev/drm/amd/amdgpu/amdgpu_irq.c:511-525",
    "sys/dev/drm/amd/amdgpu/amdgpu_virt.c:282",
    "sys/dev/drm/amd/amdgpu/amdgpu_device.c:1696",
    "sys/dev/drm/amd/amdgpu/amdgpu_device.c:2700",
    "sys/dev/drm/amd/amdgpu/amdgpu_device.c:2936",
    "sys/dev/drm/amd/amdgpu/amdgpu_kms.c:180",
    "sys/dev/drm/include/linux/workqueue.h:47-56",
    "sys/dev/drm/linux_workqueue.c:89"
  ],
  "poc_changes": "No runnable PoC exists for this class: requires Vega20-class SR-IOV VF plus a PF timing an FLR notification into the probe window. Pack carries the code-order proof instead.",
  "attempts": 0,
  "guest_uname": "DragonFly dfbsd 6.5-DEVELOPMENT DragonFly 6.5-DEVELOPMENT #0: Thu Jul 2 06:02:54 UTC 2026 root@dfbsd:/usr/obj/usr/src/sys/X86_64_GENERIC x86_64",
  "runtime_sec": 0,
  "guest_dirty": 0,
  "build_cmd": "",
  "run_cmd": "",
  "code_hash": "",
  "notes": "Guest evidence of hardware absence: only display device is QEMU std VGA (vgapci0 pci0:0:2:0 chip=0x1111234); no SR-IOV; sysctl kern.conftxt contains zero drm/ath device lines; /dev/dri absent. Enum note: DB poc enum has no not_testable/skipped; untested is the honest value (never built/run).",
  "recommended_fix": "Move INIT_WORK(&adev->virt.flr_work, ...) above both amdgpu_irq_get() calls in xgpu_ai_mailbox_get_irq() (see fix.diff).",
  "fix_status": "not_testable",
  "fix_baseline_reproduced": 0,
  "fix_patched_reproduced": 0,
  "fix_verdict": "fix.diff moves INIT_WORK before the interrupt-source enable, removing the window by construction; cannot be build-validated on this guest (no AMD hardware, amdgpu not compiled in), hence not_testable.",
  "fix_evidence": "findings/poc/DF-4975/fix.diff"
}