BUILD2_OK
register DC_GPIO_I2CPAD_A (0x4899) real fields: SCL=0x1 SDA=0x2
id_to_offset(DDC_DATA, I2C_PAD) mask = 0x100 -> WRONG: selects bit 8; SDA is bit 1 — reserved-bit write / dead-bit read
id_to_offset(DDC_CLOCK, I2C_PAD) mask = 0x1 -> correct (by coincidence: DDC CLK bit == SCL bit)
control: id_to_offset(DDC_DATA, DDC1) mask = 0x100 vs DC_GPIO_DDC1DATA_A_MASK=0x100 -> correct (shared mask valid for real DDC lines)
EXIT=0