# DF-4915 — trigger procedure (SR-IOV VF AMD GPU required)

Prerequisite hardware: AMD GPU with SR-IOV (Tonga/Fiji/Polaris/Vega10) on the
host, one VF passed through to a DragonFly 6.x guest (e.g. `pptdevs=5:0.0` in
`/boot/loader.conf`), `amdgpu.ko` loadable in the guest.

## Leg-1 — guaranteed console flood (no fault injection)

    kldload amdgpu            # in the VF guest
    dmesg | tail              # after init completes, full-access is released
    # any runtime driver activity that touches MMIO now routes via KIQ:
    tail -f /var/log/messages

Expected: `amdgpu_virt_kiq_rreg: implement in_interrupt() function` and/or the
`_wreg` twin printed for every KIQ-mediated access — including bursts aligned
with GPU interrupts (CZ-class parts: one line per interrupt via
`cz_ih_set_rptr`'s unconditional `WREG32(mmIH_RB_RPTR)`).

## Leg-2 — illegal `msleep()` from hardirq (needs stalled KIQ)

1. Host: trigger a VF function-level reset while the guest driver is at
   runtime (`AMDGPU_SRIOV_CAPS_RUNTIME` set), or otherwise stall the KIQ ring
   so `amdgpu_fence_wait_polling()` times out.
2. Guest: generate GPU interrupts (any GEM workload; on Tonga an IH ring
   overflow also works — the `RB_OVERFLOW` path in `tonga_ih_get_wptr` does a
   plain `RREG32(mmIH_RB_CNTL)` from the hardirq).
3. Expected: guest hardirq spins 5 ms in `amdgpu_fence_wait_polling`, then
   enters `msleep(5)` from interrupt context (`amdgpu_virt.c:175/:229`) —
   INVARIANTS kernels panic; others corrupt scheduler state / wedge the CPU
   in the interrupt path for up to ~80 x (5 ms poll + 5 ms sleep).

## Why it cannot run in the audit guest

`pciconf -l` shows zero vendor-0x1002 functions (see `env.txt`); `amdgpu.ko`
is present but no device binds, so `amdgpu_virt_kiq_rreg/wreg` are never
called. Classification on this guest: not_reproduced (hardware absent).