--- a/sys/dev/drm/amd/amdgpu/vce_v2_0.c
+++ b/sys/dev/drm/amd/amdgpu/vce_v2_0.c
@@ -421,7 +421,9 @@ static int vce_v2_0_sw_init(void *handle)
 	if (r)
 		return r;
 
+	/* NB: the VCPU cache windows mapped in vce_v2_0_mc_resume() start
+	 * AMDGPU_VCE_FIRMWARE_OFFSET (256) bytes into the bo, so the bo
+	 * must be 256 bytes larger than FW+STACK+DATA (DF-4742 / DF-4524). */
 	r = amdgpu_vce_sw_init(adev, VCE_V2_0_FW_SIZE +
-		VCE_V2_0_STACK_SIZE + VCE_V2_0_DATA_SIZE);
+		AMDGPU_VCE_FIRMWARE_OFFSET +
+		VCE_V2_0_STACK_SIZE + VCE_V2_0_DATA_SIZE);
 	if (r)
 		return r;