# DF-4416 — i915: `fls()` off-by-one in MCR slice selection (`wa_init_mcr` + `intel_calculate_mcr_s_ss_select`)

- **File**: sys/dev/drm/i915/intel_workarounds.c (companion: sys/dev/drm/i915/intel_engine_cs.c)
- **Severity**: Low · **CWE**: CWE-193 · **Confidence**: certain (defect) / likely (HW impact)
- **Status**: untested — no Intel gen10/11 GPU in the audit QEMU guest.

## Build / Run / Expected
Not runnable in this environment. Requires Ice Lake / Cannon Lake graphics
hardware. On such hardware: apply fix.diff, rebuild kernel, and after init dump
GEN8_MCR_SELECTOR (0xFD0): baseline steers slice=1 on single-slice parts
(slice_mask==0x1); patched steers slice=0. See VERDICT.md for the full
line-cited analysis (0-based field semantics proven via
`for_each_instdone_slice_subslice`, intel_ringbuffer.h:103-109).

## Artifacts
VERDICT.md · verdict.json · fix.diff · manifest.json