{
  "finding_id": "DF-3735",
  "status": "inconclusive",
  "reproduced": 0,
  "impact": "none",
  "confidence": "likely",
  "verdict": "Source-certain OOB heap read reachable in the DEFAULT power-management configuration: r600_pm_init_profiles non-R600 branch (r600.c:680-715) hardcodes clock-mode indices up to 2 (dpms_on_cm_idx=2 for PM_PROFILE_DEFAULT_IDX at r600.c:685) with no validation against the target power states num_clock_modes. On r6xx discrete ASICs (RV610..RV670, wired at radeon_asic.c:987/1073/1272/1392) with PowerPlayInfo frev1/2 BIOS tables every state has exactly one clock mode and a 1-element clock_info allocation (radeon_atombios.c:2126-2133), so radeon_set_power_state reads power_state[ps].clock_info[2].sclk/.mclk (radeon_pm.c:181-199) and r600_pm_misc reads .voltage (r600.c:771) two elements past the allocation on the first set_clocks with an active display; the garbage values are programmed as engine/memory clocks and VOLTAGE_SW voltage. No sysfs or DYNPM needed \u2014 PM_PROFILE_DEFAULT + PM_METHOD_PROFILE are the out-of-the-box settings (radeon_pm.c:1359, 1584-1587), invoked from radeon_pm_compute_clocks_old at radeon_pm.c:1753-1756. Runtime reproduction was impossible on the audit guest: virtio-only (no AMD PCI device) and radeonkms.ko is not built for the guest kernel (env.txt/run.log).",
  "exploit_chain": "",
  "evidence": "VERDICT.md (full source-level trace with path:line); fix.diff (consumer-side clamp in radeon_set_power_state); run.log + env.txt (guest: no AMD GPU, no radeonkms.ko \u2014 224 radeonkmsfw_* firmware stubs only, including R600/RV61x/RV63x/RV670 images); decisive lines: r600.c:685 (hardcoded dpms_on_cm_idx=2), radeon_pm.c:133-143 + 1753-1756 + 181-199 (default-config consumption), radeon.h:1300-1311 (clock_info per-state heap pointer), radeon_atombios.c:2126-2133 (1-element allocation, num_clock_modes=1).",
  "kernel_refs": [
    "sys/dev/drm/radeon/r600.c:680-715",
    "sys/dev/drm/radeon/r600.c:685",
    "sys/dev/drm/radeon/r600.c:766-783",
    "sys/dev/drm/radeon/radeon.h:1300-1311",
    "sys/dev/drm/radeon/radeon_atombios.c:2126-2133",
    "sys/dev/drm/radeon/radeon_pm.c:133-143",
    "sys/dev/drm/radeon/radeon_pm.c:171-199",
    "sys/dev/drm/radeon/radeon_pm.c:1753-1756",
    "sys/dev/drm/radeon/radeon_asic.c:987"
  ],
  "poc_changes": "No runnable PoC exists for a kernel-internal PM index bug without r6xx hardware; replaced with a source-level proof plus guest module/hardware presence check.",
  "attempts": 1,
  "guest_uname": "DragonFly dfbsd 6.5-DEVELOPMENT DragonFly 6.5-DEVELOPMENT #0: Thu Jul  2 06:02:54 UTC 2026     root@dfbsd:/usr/obj/usr/src/sys/X86_64_GENERIC  x86_64",
  "runtime_sec": 10,
  "guest_dirty": 0,
  "build_cmd": "n/a \u2014 no buildable trigger without r6xx hardware; guest check: dfbsd-qemu/vm.sh run_root ls /boot/kernel/radeonkms.ko; pciconf -l | grep 1002",
  "run_cmd": "./run.sh",
  "code_hash": "",
  "notes": "Reachable in the default profile-mode configuration (no sysfs needed), unlike DF-1196/DF-3734 which are gated on DYNPM (sysfs compiled out on DragonFly). CHIP_R600 branch uses cm 0 only (safe); IGP uses rs780_pm_init_profile cm 0 only (safe); pplib frev>=4 BIOSes allocate multi-mode arrays (not affected). Impact ceiling: OOB heap read feeding GPU clock/voltage programming (local DoS / hardware misbehavior), no direct kernel-memory disclosure to userspace.",
  "recommended_fix": "Clamp requested_clock_mode_index to power_state[requested_power_state_index].num_clock_modes-1 in radeon_set_power_state before first use (covers the hardcoded profile indices and the DYNPM increment) \u2014 see fix.diff.",
  "fix_status": "not_testable",
  "fix_baseline_reproduced": 0,
  "fix_patched_reproduced": 0,
  "fix_verdict": "fix.diff authored against the read-only sys/ tree; kernel fix build/validation not attempted \u2014 the guest has no radeon hardware and no radeonkms.ko, so neither baseline nor patched behavior is observable.",
  "fix_evidence": "findings/poc/DF-3735/fix.diff"
}