DF-3650 / verdict.json
{ "finding_id": "DF-3650", "status": "inconclusive", "reproduced": 0, "impact": "none", "confidence": "certain", "verdict": "Source-certain OOB read, CI-specific (the si twin has no VCE DPM states and the amdgpu audits DF-3619..3625 do not cover it). After the per-state loop, ci_parse_power_table fills rdev->pm.dpm.vce_states[]: clock_array_index = vce_states[i].clk_idx (ci_dpm.c:5656) and clock_info = &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize] (5657-5658). The main loop above bounds the very same index against clock_info_array->ucNumEntries (5637-5638); the VCE loop does not. clk_idx originates from the VBIOS VCE state table masked to 6 bits (r600_dpm.c:1127, ucClockInfoIndex & 0x3f, so 0..63) and ucEntrySize is a raw u8 (up to 255), giving a read up to ~16KB past clockInfo[] inside (or beyond) the heap-allocated ATOM BIOS image copy - harness section [E]: 63*255 = 16065 bytes. Within the allocation the leaked bytes flow into vce_states[].sclk/mclk (power-management only, no userspace exposure found); past its end it is a wild read -> panic. Reachable whenever the VBIOS carries an extended header with a VCE table whose state records reference out-of-range clock info indices. Kernel path unreachable on this GPU-less guest; inconclusive overall.", "exploit_chain": "Crafted VBIOS with an extended header + VCE state table whose ucClockInfoIndex values point past the (small) clock info array -> up-to-16KB OOB read from the kernel heap bios image during ci_dpm_init; values only feed power management, so realistic impact is a wild-read panic (DoS), info-pollution at best.", "evidence": "VERDICT.md (full source trace); harness.c + run.log/run.2.log section [E] (clk_idx=63 * entrySize=255 = 16065 bytes past clockInfo[0] (ucNumEntries=1)); env.txt (guest has no AMD GPU: pciconf 0x1002 count=0, /dev/dri absent, no drm kld); fix.diff", "kernel_refs": [ "sys/dev/drm/radeon/ci_dpm.c:5637", "sys/dev/drm/radeon/ci_dpm.c:5654", "sys/dev/drm/radeon/ci_dpm.c:5656", "sys/dev/drm/radeon/ci_dpm.c:5657", "sys/dev/drm/radeon/r600_dpm.c:1127" ], "poc_changes": "n/a \u2014 no seeded PoC for pass-2; harness written fresh (models the exact kernel types; divisors made volatile so -O2 cannot fold the #DE)", "attempts": 2, "guest_uname": "DragonFly dfbsd 6.5-DEVELOPMENT DragonFly 6.5-DEVELOPMENT #0: Thu Jul 2 06:02:54 UTC 2026 root@dfbsd:/usr/obj/usr/src/sys/X86_64_GENERIC x86_64", "runtime_sec": 45, "guest_dirty": 1, "build_cmd": "cc -O2 -Wall -o harness harness.c", "run_cmd": "./harness", "code_hash": "af83fc943c96cc840bab14bf99787f6e37c43ec42b624d998c2461cc2dad15f2", "notes": "pass 2 radeon/ci_dpm.c; twins: CI-specific; no twin. Guest virtio-only per task; harness scratch files under /root removed.", "recommended_fix": "Apply the same clock_array_index >= clock_info_array->ucNumEntries bound (as at ci_dpm.c:5637) to the VCE state fill loop.", "fix_status": "not_testable", "fix_baseline_reproduced": 0, "fix_patched_reproduced": 0, "fix_verdict": "Fix validation would require a CI-class GPU with a crafted VBIOS (baseline panic/corruption) and a single-fix kernel build; the audit guest is virtio-only, so the fix is source-reviewed only (fix.diff).", "fix_evidence": "fix.diff in this pack; not applied to sys/ (read-only audit target)." } |