--- a/sys/dev/netif/ig_hal/e1000_ich8lan.c
+++ b/sys/dev/netif/ig_hal/e1000_ich8lan.c
@@ -4697,6 +4697,7 @@
 	u32 flash_linear_addr;
 	/* bank size is in 16bit words - adjust to bytes */
 	u32 flash_bank_size = nvm->flash_bank_size * 2;
+	u32 bank_base_addr;
 	s32 ret_val;
 	s32 count = 0;
 	s32 j, iteration, sector_size;
@@ -4742,8 +4743,10 @@
 	/* Start with the base address, then add the sector offset. */
 	flash_linear_addr = hw->nvm.flash_base_addr;
 	flash_linear_addr += (bank) ? flash_bank_size : 0;
+	bank_base_addr = flash_linear_addr;
 
 	for (j = 0; j < iteration; j++) {
+		count = 0;
 		do {
 			u32 timeout = ICH_FLASH_ERASE_COMMAND_TIMEOUT;
 
@@ -4776,7 +4779,7 @@
 			 * block into Flash Linear address field in Flash
 			 * Address.
 			 */
-			flash_linear_addr += (j * sector_size);
+			flash_linear_addr = bank_base_addr + (j * sector_size);
 			E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR,
 					      flash_linear_addr);
 
@@ -4796,6 +4799,9 @@
 			else if (!hsfsts.hsf_status.flcdone)
 				return ret_val;
 		} while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT);
+
+		if (ret_val != E1000_SUCCESS)
+			return ret_val;
 	}
 
 	return E1000_SUCCESS;