== DF-3612 harness: crafted VBIOS ASIC_InternalSS_Info with usSpreadRateInKhz == 0 ==

radeon_atombios.c:1546: ss->rate = le16(vbios)  [no zero check], returns true
reference_clock=27000 reference_divider=2

[A1] engine SS: si_dpm.c:4831  clk_s = ref*5 / (ref_div * ss.rate)  with rate=0
    child died from SIGFPE (signal 4): integer divide by zero
    >>> In kernel: #DE fault -> panic during DPM power-state upload <<<

[A2] memory SS: si_dpm.c:4931  clks = ref*5 / ss.rate  with rate=0
    child died from SIGFPE (signal 4): integer divide by zero
    >>> In kernel: #DE fault -> panic during DPM power-state upload <<<

[B] Fixed path (fix.diff: `if (ss.rate == 0) return -EINVAL;` before use)
    rate=0 -> rc=-1 (SS skipped, no trap, DPM continues without SS)
    rate=30 -> rc=0 (SS programmed normally)
RUN_RC=0