=== DF-2303 (A): setup arrq via REAL db_init + rx_enable ===
CTL_DBINIT rc=0 dbinit.rc=0 ndesc=1 ndb=128 esize=16 ssize=4096 nseg=1 seg0=0xfffff8008ed3f000 seglast=0xfffff8008ed3f000 elem0=0xfffff8008ed3f000 bus=0x100000 past=0xfffff8008ed3f010 elem2=0 va=0xfffff8008ed3f000 bus2=0x100000 eps=256
CTL_RXEN rc=0 ch=2 rx_enable rc=0
debug.firewire_debug: 0 -> 1
--- battery: WREQB (16B hdr) F=4,8,12 ---
CTL_ARCV rc=0 arcv.rc=0 mode=0 F=4 tcode=1 rlen_old=4 after: buf_offset=16 pdb_tr=0
CTL_ARCV rc=0 arcv.rc=0 mode=0 F=8 tcode=1 rlen_old=8 after: buf_offset=12 pdb_tr=0
CTL_ARCV rc=0 arcv.rc=0 mode=0 F=12 tcode=1 rlen_old=12 after: buf_offset=8 pdb_tr=0
--- battery: WRES (12B hdr) F=4,8 ---
CTL_ARCV rc=0 arcv.rc=0 mode=0 F=4 tcode=2 rlen_old=4 after: buf_offset=12 pdb_tr=0
CTL_ARCV rc=0 arcv.rc=0 mode=0 F=8 tcode=2 rlen_old=8 after: buf_offset=8 pdb_tr=0
=== battery done; guest: 12:06PM  up 33 secs, 0 users, load averages: 0.24, 0.06, 0.02 ===
=== rlen observations from the REAL code (firewire_debug=1): ===
FWOH: ARCV NATURAL tcode=1 hdr=16 F=4 X=4092 (rlen_old=4 rlen_new=12) -> REAL fwohci_arcv
split header
rlen=4, offset=-4092
FWOH: ARCV NATURAL tcode=1 hdr=16 F=8 X=4088 (rlen_old=8 rlen_new=8) -> REAL fwohci_arcv
split header
rlen=8, offset=-4088
FWOH: ARCV NATURAL tcode=1 hdr=16 F=12 X=4084 (rlen_old=12 rlen_new=4) -> REAL fwohci_arcv
split header
rlen=12, offset=-4084
FWOH: ARCV NATURAL tcode=2 hdr=12 F=4 X=4092 (rlen_old=4 rlen_new=12) -> REAL fwohci_arcv
split header
rlen=4, offset=-4092
FWOH: ARCV NATURAL tcode=2 hdr=12 F=8 X=4088 (rlen_old=8 rlen_new=8) -> REAL fwohci_arcv
split header
rlen=8, offset=-4088
=== DF-2303 (A) done ===