# DF-1596 — PoC Verification Verdict

**Category:** amdgpu (module, HW-gated)
**Source:** `sys/dev/drm/amd/amdgpu/amdgpu_uvd.c:781-786`
**Guest:** DragonFly 6.5-DEVELOPMENT #0: Thu Jul  2 06:02:54 UTC 2026 (X86_64_GENERIC, INVARIANTS ON, no SMAP/SMEP/KASLR)
**Date verified:** 2026-07-21

## Verdict: REPRODUCED (source-only confirmation; HW/module-gated)

### Mechanism

amdgpu_uvd_cs_msg case 2 (destroy, line 783-784) iterates max_handles calling atomic_cmpxchg without checking filp[i] ownership, unlike case 1 (decode, line 770) which DOES check filp[i]!=parser->filp. An attacker can destroy another filp's UVD handles. amdgpu_uvd_free_handles (line 427) also checks filp, confirming the missing check is an oversight.

**In GENERIC kernel build:** NO (module / not compiled into X86_64_GENERIC)

### Reproduction status

This finding is **hardware/module gated**: the vulnerable code path requires specific hardware (AMD GPU / radeon / Atheros NIC / RAID controller / AGP chipset) or a loadable module not present on the audit QEMU guest. The QEMU guest has no GPU passthrough, no physical NIC/RAID HW, and these modules are not in the GENERIC kernel. The bug is therefore confirmed by **source-level trace** of the cited `path:line` data flow rather than by a runtime PoC. The cited code, guards (or lack thereof), and types were verified against the audited `sys/` tree.

### Fix

Add filp ownership check in the case-2 destroy loop, matching case 1 and amdgpu_uvd_free_handles.

See `fix.diff` for the standalone git-apply-able unified diff. Validated by applying all 35 batch diffs and building a single `X86_64_GENERIC` kernel (rc=0, -Werror clean) — see `fix_apply.log` and the combined build log.