--- a/sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1364,8 +1364,7 @@
 	if (res)
 		res = verify_clock_values(&fclks);
 
-	if (res) {
-		ASSERT(fclks.num_levels >= 3);
+	if (res && fclks.num_levels >= 3) {
 		dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 = 32 * (fclks.data[0].clocks_in_khz / 1000.0) / 1000.0;
 		dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72 = dc->dcn_soc->number_of_channels *
 				(fclks.data[fclks.num_levels - (fclks.num_levels > 2 ? 3 : 2)].clocks_in_khz / 1000.0)