diff --git a/sys/dev/drm/radeon/ci_dpm.c b/sys/dev/drm/radeon/ci_dpm.c --- a/sys/dev/drm/radeon/ci_dpm.c +++ b/sys/dev/drm/radeon/ci_dpm.c @@ -3511,7 +3511,8 @@ SMU7_MAX_LEVELS_MVDD); pi->dpm_table.sclk_table.count = 0; - for (i = 0; i < allowed_sclk_vddc_table->count; i++) { + for (i = 0; i < allowed_sclk_vddc_table->count && + i < MAX_REGULAR_DPM_NUMBER; i++) { if ((i == 0) || (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != allowed_sclk_vddc_table->entries[i].clk)) { @@ -3524,7 +3525,8 @@ } pi->dpm_table.mclk_table.count = 0; - for (i = 0; i < allowed_mclk_table->count; i++) { + for (i = 0; i < allowed_mclk_table->count && + i < MAX_REGULAR_DPM_NUMBER; i++) { if ((i == 0) || (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != allowed_mclk_table->entries[i].clk)) { @@ -3536,33 +3538,42 @@ } } - for (i = 0; i < allowed_sclk_vddc_table->count; i++) { + for (i = 0; i < allowed_sclk_vddc_table->count && + i < MAX_REGULAR_DPM_NUMBER; i++) { pi->dpm_table.vddc_table.dpm_levels[i].value = allowed_sclk_vddc_table->entries[i].v; pi->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].leakage; pi->dpm_table.vddc_table.dpm_levels[i].enabled = true; } - pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; + pi->dpm_table.vddc_table.count = + (allowed_sclk_vddc_table->count <= MAX_REGULAR_DPM_NUMBER) ? + allowed_sclk_vddc_table->count : MAX_REGULAR_DPM_NUMBER; allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; if (allowed_mclk_table) { - for (i = 0; i < allowed_mclk_table->count; i++) { + for (i = 0; i < allowed_mclk_table->count && + i < MAX_REGULAR_DPM_NUMBER; i++) { pi->dpm_table.vddci_table.dpm_levels[i].value = allowed_mclk_table->entries[i].v; pi->dpm_table.vddci_table.dpm_levels[i].enabled = true; } - pi->dpm_table.vddci_table.count = allowed_mclk_table->count; + pi->dpm_table.vddci_table.count = + (allowed_mclk_table->count <= MAX_REGULAR_DPM_NUMBER) ? + allowed_mclk_table->count : MAX_REGULAR_DPM_NUMBER; } allowed_mclk_table = &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk; if (allowed_mclk_table) { - for (i = 0; i < allowed_mclk_table->count; i++) { + for (i = 0; i < allowed_mclk_table->count && + i < MAX_REGULAR_DPM_NUMBER; i++) { pi->dpm_table.mvdd_table.dpm_levels[i].value = allowed_mclk_table->entries[i].v; pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true; } - pi->dpm_table.mvdd_table.count = allowed_mclk_table->count; + pi->dpm_table.mvdd_table.count = + (allowed_mclk_table->count <= MAX_REGULAR_DPM_NUMBER) ? + allowed_mclk_table->count : MAX_REGULAR_DPM_NUMBER; } ci_setup_default_pcie_tables(rdev);